System verilog

PACKED vs UNPACKED ARRAY

logic [3:0][7:0] register [0:9];

PACKED UNPACKED

PACKED - Assigned in contiguous location in memory. Part select is supported. (restricted to bit, logic, int etc)

UNPACKED - Can be assigned in random location in memory. No part select support.

ENUMERATION and TYPEDEF

Enumerations allow you to define a data type whose values have names. Such data types are appropriate and useful for representing state values, opcodes and other such non-numeric or symbolic data.

Typedef allows user to create custom data type.

TYPEDEF example:

typedef logic [7:0] octet;

typedef octet [3:0] quadOctet;

quadOctet qBytes [1:10];

logic [7:0] [3:0] qBytes [1:10];

ENUM:

enum { circle, ellipse, freeform } c;

typedef enum { circle, ellipse, freeform } ClosedCurve;

ClosedCurve c;

The named values of an enumeration type act like constants. The default type is int. You can copy them to and from variables of the enumeration type, compare them with one another and so on. Enumerations are strongly typed. You can’t copy a numeric value into a variable of enumeration type, unless you use a type-cast:

c = 2; // ERROR

c = ClosedCurve'(2); // Casting – okay

However, when you use an enumeration in an expression, the value you are working with is the literal’s integer equivalent; so, for example, it’s okay to compare an enumeration variable with an integer; and it’s okay to use an enumeration value in an integer expression.

Sample param using struct

module regSample;

typedef struct packed {

logic [7:0] offset;

logic [7:0] bits;

}bitDescr;

parameter bitDescr regF [0:1] = '{'{8'h1,8'h4}, '{8'h2,8'h8}};

logic [regF[0].bits -1 : 0] sampleReg0;

logic [regF[1].bits -1 : 0] sampleReg1;

initial

begin

sampleReg0 = regF[0].offset;

$display ("Sample0 = %d",sampleReg0);

sampleReg1 = 8'hFF;

$display ("Sample1 = %d",sampleReg1);

end

endmodule

Issue with nested struct

A field name of a struct is not another type or a variable.

This is an issue as getting the width of a field is not possible (since $bits only take "type" as input)

For e.g.

typedef struct packed {

logic [1:0] f1;

logic [2:0] f2;

} sample_t;

parameter STRUCT_WIDTH = $bits(sample_t);

parameter FIELD_WIDTH = $bits(sample_t.f1); // <- *Errors out

An alternate solution is to create a typedef for the field being used.

i.e.

typedef logic [1:0] f1;

typedef struct packed {

f1_t f1;

logic [2:0] f2;

} sample_t;

parameter STRUCT_WIDTH = $bits(sample_t);

parameter FIELD_WIDTH = $bits(f1_t);

Note: There is a suggestion on forum (from Dave rich) --> "Declare an automatic variable local to the scope where you need the $bits. It will probably get optimized away, but not before the type information gets extracted for $bits."

Struct debug

To debug struct use the %p format specifier. This will print the entire struct in a clean formatted way.

e.g.:

// Struct definition

typedef struct packed {

bit [7:0] addr;

bit valid;

bit [31:0] data;

} mem_pkt;

// Struct declaration

mem_pkt pkt;

// Initializing Struct

pkt = '{8'h6, 1'b1, 32'hC001_0FAB};

$display ("pkt = %p", pkt);

// This will print.

pkt = '{addr:6, valid:1, data:3221295019}

Format specifiers

Systemverilog supports a list of new format specifiers.

%p -> Print struct in a formatted way

%m -> Print the hierarchy of the design element, named block etc.

Other tips n tricks:

Size of a design elements, $bits operator can be used in combination with concatenation operator.
- Example:

$display("Port width = %0d", $bits({port1,port2,....}));